Helmut Stiebig

Amorphous Silicon,Charge Carrier Mobility,Gate Dielectric,High Charge Carrier Mobility,Nanocrystalline Silicon,Plasma-enhanced Chemical Vapor Deposition,Solar Cells,Thin-film Solar Cells,Threshold Voltage,Absorber Layer,Additional Charge,Amorphous Phase,Back Contact,Back Reflector,Bias Stress,Building Structures,Carrier Mobility,Channel Layer,Channel Length,Channel Material,Charge Carriers,Charge Trapping,Chemical Vapor Deposition,Complementary Metal-oxide-semiconductor Inverter,Crystalline Fraction,Defect Density,Drain Current,Drain Voltage,Effective Refractive Index,Efficient Light Trapping,Electron Charge,Electron Paramagnetic Resonance,Electronic Properties,Flat Interface,Fraction Of Material,Function Of Volume Fraction,Gate Bias,Gate Current,Grain Boundaries,High Carrier Mobility,High Charge,High Electron,High Electron Mobility,High Mobility,Highest Charge,Hole Charge,Light Traps,Light-trapping Structures,Maxwell’s Equations,Negative Bias,