Woong Choi

Also published under:W. B. Choi

Affiliation

Electronics Engineering, Sookmyung Women’s University, Seoul, South Korea

Topic

Power Consumption,Decoding,Deep Neural Network,Inductor Current,Inverter,Least Significant Bit,Load Current,Partial Products,Read Operation,Reduction In Counts,Sign Bit,Static Random Access Memory,Supply Voltage,Transient Response,Transistor Size,Voltage Ripple,Voltage Stress,12-V Input,8T Static Random Access Memory,Access Mode,Access Patterns,Accuracy Drop,Active Area,Active-matrix Organic Light-emitting Diode,Addition Operations,Additional Circuitry,Amount Of Growth,Appendix Section,Area Overhead,Array Size,Bitonic Sort,Boolean Algebra,Boolean Expression,Buck Converter,CMOS Process,Capacitive Coupling,Charge Pump,Column Index,Comparable Yields,Compressor,Conduction Loss,Conventional Array,Conventional Converter,Conventional Memory,Conventional Topology,Conversion Loss,Current Compensation,DC Conductivity,DC Gain,Dcdc Converter,

Biography

Woong Choi (Member, IEEE) received the B.S. and Ph.D. degrees in electronics engineering from Korea University, Seoul, South Korea, in 2011 and 2018, respectively.
In 2018, he joined Samsung Electronics Ltd., Hwaseong-si, South Korea. Since 2019, he has been an Assistant Professor with the Department of Electronics Engineering, Sookmyung Women’s University, Seoul. His current research interests include the neural network accelerator and embedded memory designs in advanced technologies.