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J. Barwin
Also published under:J. C. Barwin
Affiliation
IBM Systems and Technology Group, Essex Junction, Vermont, USA
Topic
65-nm Technology,Area Overhead,Block Level,Current Mirror,Current Reference,Current Sink,Cycle Time,Data Retention,Entire Chip,Load Current,Magnetic Interference,Mirroring,Peripheral Circuits,Physical Orientation,Reference System,SRAM Design,Sense Amplifier,Single Array,Turnitin,Unstable Cells,Voltage Difference,Word Line,
Biography
John C. Barwin graduated from Vermont Technical College (ASEE) in 1985, and recceived the Bachelors degree (summa cum laude) in mathematics from Castleton State College in 1990.
He worked for Bio-Tek Instruments, Inc., in the development of automated ELISA-based blood testing equipment. He joined IBM in 1996 and completed the M.Sc. (E.E.) degree at the University of Vermont in 2000. He continues his work as a Staff Engineer on the development of SDRAM, SRAM and MRAM products.
He worked for Bio-Tek Instruments, Inc., in the development of automated ELISA-based blood testing equipment. He joined IBM in 1996 and completed the M.Sc. (E.E.) degree at the University of Vermont in 2000. He continues his work as a Staff Engineer on the development of SDRAM, SRAM and MRAM products.