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Vincenzo Catania
Also published under:V. Catania
Affiliation
Department of Electrical, Electronics and Computer Engineering, University of Catania, Catania, Italy
Topic
Deep Neural Network,Hardware Accelerators,Neural Network,Deep Neural Network Model,Convolutional Neural Network,Design Space,Feature Maps,Pareto Front,Pareto Optimal,Source Code,Accuracy Loss,Approximate Computation,Architectural Space,Bit Error Rate,Compression Ratio,Convolutional Layers,Crossover Operator,Energy Conservation,Energy Consumption,Energy Reduction,Error Rate,External Memory,Genetic Operators,Indoor Environments,Indoor Localization,Internet Of Things Devices,K-nearest Neighbor,Lossy Compression,Magnetic Field,Memory Footprint,Multi-objective Optimization,Online Phase,Optimal Error,Optimal Power,Pareto Optimal Solutions,Pareto Set,Performance Metrics,Space Exploration,Space Mapping,Support Vector Machine,Top-5 Accuracy,Voltage Levels,Voltage Scaling,Accuracy Of Model,Application Of Techniques,Architecture In Order,Architecture Parameters,Bit Error,Blue Dots,Blue Points,
Biography
Vincenzo Catania received the Laurea degree in electrical engineering from the University of Catania, Catania, Italy, in 1982.
He is a Full Professor of Computer Engineering with the University of Catania. He was with STMicroelectronics, Catania, till 1984, as responsible for testing microprocessor systems. His current research interests include performance and reliability assessment in parallel and distributed systems, the Internet of Things, and pervasive mobile computing.
He is a Full Professor of Computer Engineering with the University of Catania. He was with STMicroelectronics, Catania, till 1984, as responsible for testing microprocessor systems. His current research interests include performance and reliability assessment in parallel and distributed systems, the Internet of Things, and pervasive mobile computing.