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Jun Yuan
Affiliation
Jasper Design Automation, Mountain View, CA, USA
Topic
Constraint Satisfaction Problem,Gene Vector,Input Variables,Original Constraints,State Variables,Boolean Constraints,Boolean Function,Connective,Number Of Input Variables,Random Generation,Random Vector,Reduction In Time,Syntactic,Time And Space,Boolean Variable,Clock Cycles,Complete Extraction,Disjunction,Formal Verification,Function Of Variables,Functional Decomposition,Functional Verification,Groups Of Variables,Industrial Settings,Input Bias,Joining Tree,Normal Form,Priority Level,Random Simulations,Random Walk,Set Of Rules,State Design,State Machine,Stimulus Generation,Test Bench,Verification Method,Model Checking,Primary Input,Reachability Analysis,Reachable States,State Space,Boolean Logic,Commercial Tools,Control Unit,Coverage Goals,Cut-points,Design Cycle,Design Specifications,Design Style,Directed Graph,
Biography
Jun Yuan received the B.E. degree from Tsinghua University, Beijing, China, in 1989 and the M.S. and Ph.D. degrees in electrical and computer engineering from the University of Texas, Austin, in 1995 and 2002, respectively.
He is currently with Jasper Design Automation, working on the research and development of formal verification tools. Previously, he worked on formal verification at Verplex Systems and Cadence. Before that, he worked in the Advanced Design Verification Group, Motorola Semiconductor Product Sector, on the development of formal, semiformal, and constrained functional verification technologies, and on hardware emulation methodology. Prior to Motorola, he worked in the K5 Microprocessor Design Group, Advanced Micro Devices.
He is currently with Jasper Design Automation, working on the research and development of formal verification tools. Previously, he worked on formal verification at Verplex Systems and Cadence. Before that, he worked in the Advanced Design Verification Group, Motorola Semiconductor Product Sector, on the development of formal, semiformal, and constrained functional verification technologies, and on hardware emulation methodology. Prior to Motorola, he worked in the K5 Microprocessor Design Group, Advanced Micro Devices.