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P. N. Fletcher
Also published under:P. Fletcher
Affiliation
QinetiQ Ltd., Bristol, UK
Topic
Bit Error Rate,Data Rate,Antenna Array,Wireless Local Area Network,Bitrate,Delay Spread,Least Significant Bit,Modulation Scheme,Bit Error,Data Throughput,Frequency Hopping,Fading Channel,Forward Error Correction,Maximum Likelihood Detector,Spatial Multiplexing,Channel Model,Consumer Electronic Devices,Decoding,Flat Fading,Frequency Diversity,Likelihood Ratio Test,Minimum Mean Square Error,Most Significant Bit,Personal Digital Assistants,Symbol Period,Test Environment,Time Slot,Zero-forcing,Asynchronous Mode,Bit Error Rate Performance,Candidate Solutions,Channel Matrix,Code Blocks,Collision,Conditional Probability,Connectivity States,Convolutional Encoder,Cyclic Prefix,Data Block,Design Matrix,Digital Video,Diversity Schemes,Error Floor,Error Rate,Frequency Domain,GHz Band,High Data Rate,Indoor Home Environment,Indoor Office,Indoor Office Environment,
Biography
Paul Fletcher received MEng and PhD degrees from the University of Newcastle-upon-Tyne (UK) in 1989 and 1993 respectively. He joined the low cost phased array antenna group QinetiQ Ltd. (formerly DERA) in 1993. He is currently a Visiting Industrial Fellow at the University of Bristol (UK). His research interests encompass mutual coupling compensation techniques, low sidelobe beamforming, adaptive beamforming, space-time signal processing, MIMO and spatial diversity techniques and iterative decoding. He has published over 65 journal and conference papers and holds four patents. He currently leads the space-time processing activities of the array antenna group for next generation wireless LAN and PANs within QinetiQ Ltd. He is a member of the IEE and IEEE.